1. Field of the Invention
The present invention relates generally to the field of computer systems. Specifically, the present invention relates to an implementation of graphic image rendering.
2. Description of the Related Art
In the computing industry, it is quite common to represent and convey information to a user through graphic representations. These representations may take a variety of forms, such as for example, three-dimensional objects or alphanumeric characters. To display a three-dimensional object on a two-dimensional display, the computer system must be able to include perspective in the images to add dimension. Moreover, in the case where solid three-dimensional objects are to be depicted, some mechanism must be used such that hidden surfaces are recognized and portions of the image appropriately eliminated, to obtain the desired three-dimensional effect.
A geometric model is typically comprised of one or more polygons, which may be considered as the basic building blocks for the image. In order to display a smooth edged polygon, anti-aliasing is typically performed. One conventional mechanism of anti-aliasing typically employs an A-buffer.
However, a problem with a conventional A-buffer is that it only anti-aliases polygon edges that are defined according to the vertex data. When a new edge is created due to polygon intersections, such as, for example, a first polygon xe2x80x9cpassing throughxe2x80x9d a second polygon, the new edge may not be anti-aliased because the new edge information was not included in the original vertex data. Thus, to maintain a high quality image, polygon intersection is typically not permitted.
Thus, a conventional solution to handle polygon intersection is to split intersected polygons into smaller polygons so that the smaller polygons do not intersect with one another. However, to detect intersected polygons and to split intersected polygons requires intensive computing power, which typically reduces overall system performance.
A graphics rendering system includes a processor and a device. The device is configured to store a first value, a second value, a first offset value, and a second offset value. The first value represents a Z value of a first sub-fragment and the second value points to a sub-fragment location that corresponds to the first sub-fragment. The first offset value represents an offset value of the first value in the x-direction and the second offset value represents an offset value of the first value in the y-direction. The processor is configured to perform an anti-aliasing function using the first value, the second value, the first offset value, and the second offset value.